PA-RISC is an instruction set architecture (ISA) developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer (RISC) architecture, where the PA stands for Precision Architecture. The design is also referred to as HP/PA for Hewlett Packard Precision Architecture.
In 1996 the HP/PA-RISC ISA was extended to 64 bits, with this revision named PA-RISC 2.0. It also added fused multiply–add instructions, to accelerate certain floating-point intensive algorithms, as well as the MAX-2 SIMD extension, which further helps accelerating multimedia applications.