prjtrellis: Documenting the Lattice ECP5 bit-stream format¹

Project Trellis enables a fully open-source flow for ECP5 FPGAs using Yosys for Verilog synthesis and nextpnr for place and route. Project Trellis itself provides the device database and tools for bitstream creation.

... part of T2, get it here

URL: https://github.com/SymbiFlow/prjtrellis

Author: The Project Trellis Authors
Maintainer: Rene Rebe <rene [at] t2-project [dot] org>

License: MIT
Status: Beta
Version: 35f5aff

Download: https://codeload.github.com/SymbiFlow/prjtrellis/tar.gz/ 35f5aff
Download: https://codeload.github.com/SymbiFlow/prjtrellis-db/tar.gz/ 35d900a

T2 source: prjtrellis.cache
T2 source: prjtrellis.desc

Build time (on reference hardware): 55% (relative to binutils)²

Installed size (on reference hardware): 67.74 MB, 797 files

Dependencies (build time detected): bash binutils boost cmake coreutils diffutils gawk grep gzip linux-header make python sed tar

Installed files (on reference hardware): n.a.

¹) This page was automatically generated from the T2 package source. Corrections, such as dead links, URL changes or typos need to be performed directly on that source.

²) Compatible with Linux From Scratch's "Standard Build Unit" (SBU).