Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code writen in Verilog (IEEE-1364) into some target format.
Author: David Evans email@example.com>
Maintainer: T2 Project <t2 [at] t2-project [dot] org>
Build time (on reference hardware): 65% (relative to binutils)2
Installed size (on reference hardware): 2.39 MB, 39 files
Installed files (on reference hardware):
1) This page was automatically generated from the T2 package source. Corrections, such as dead links, URL changes or typos need to be performed directly on that source.
2) Compatible with Linux From Scratch's "Standard Build Unit" (SBU).