yosys: Open Synthesis suite1

Package available in: [trunk]

Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains

... part of T2, get it here

URL: http://www.clifford.at/yosys/

Author: Clifford Wolf <clifford [at] clifford [dot] at>
Maintainer: Rene Rebe <rene [at] t2-project [dot] org>

License: ISC
Status: Stable
Version: 127484e

Download: git+https://github.com/YosysHQ/ yosys 127484eyosys-127484e.tar.gz
Download: git+https://github.com/berkeley-abc/ abc 341db25berkeley-abc-341db25.tar.gz

T2 source: abc-cc.patch
T2 source: yosys.conf
T2 source: yosys.desc

Build time (on reference hardware): n.a.

Installed size (on reference hardware): n.a.

Dependencies (build time detected): n.a.

Installed files (on reference hardware): n.a.

1) This page was automatically generated from the T2 package source. Corrections, such as dead links, URL changes or typos need to be performed directly on that source.

2) Compatible with Linux From Scratch's "Standard Build Unit" (SBU).